The Boundary-Scan Handbook

The Boundary-Scan Handbook, by Kenneth P. Parker, contains a collection of design rules applied principally at the Integrated Circuit level that allow software to alleviate the growing cost of designing, producing and testing digital systems. Chapter 2 is tutorial in nature.

Find it on Amazon: http://www.amazon.com/Boundary-Scan-Handbook-Kenneth-P-Parker/dp/1402074964/ref=cm_cr_pr_product_top

Informational guide to IEEE 1149.1
Since the mid-1970s, the structural testing of the loaded printed circuit boards (PCBs) has relied very heavily on the use of the so-called in-circuit "bed-of-nails" technique. This method of testing makes use of a fixture containing a bed-of-nails to access individual devices on the board through test lands laid into the copper interconnect, or other convenient contact points. Testing then proceeds in two phases: the power-off tests followed by power-on tests. Power-off tests check the integrity of the physical contact between nail and the on-board access point. They then carry out open and shorts tests based on impedance measurements. Power-on tests apply stimulus to a chosen device on a board, with an accompanying measurement of the response from that device. Other devices that are electrically connected to the device-under-test (DUT) are usually placed into a safe state (a process called "guarding"). In this way, the tester is able to check the presence, orientation, and bonding of the DUT in place of the board.

Fundamentally, the in-circuit bed-of-nails technique relies on physical access to all devices on a board. Such was the technique in the mid-1980s when a group of concerned test engineers got together to examine the problem and its solutions. The method of solution was based on the concept of a serial shift register around the boundary of the device - hence the name "boundary scan".

Principles of Boundary Scan
Each primary input signal and primary output signal is supplemented with a multi-purpose memory element called a boundary-scan cell. Cells on device primary inputs are referred to as "input cells"; cells on the primary output are referred to as "output cells". The input and outputs is relative to the core logic of the device. The collection of the boundary cells is configured into a parallel-in, parallel-out shift register. A parallel load operation, called a "capture" operation, causes signal values on device input pins to be loaded into input cells and, signal values passing from the core logic to the device output pins to be loaded into output cells. A parallel unload operation called an "update" operation causes signal values already present in the output scan cells to be passes out through the device output pins. Signal values already present in the input scan cells will be passed into the core logic.

Data can also be shifted around the shift register, in serial mode, starting from a dedicated device input called TDI and terminating at a dedicated device output pin called TDO. The test clock TCK, is fed in via another dedicated device input pin and the mode of operation is controlled by a dedicated TMS serial control signal. At the device level, the boundary scan elements contribute nothing to the functionality of the core logic. In fact, the boundary scan path is independent of the function of the device. On board the four; boundary scan devices are connected from one to the next in a serial format. The TDI input to the board is connected to the TDI input of the first device; the TDO output of the first device is connected to the TDI input of the next device; and so forth; creating a global scan path terminating at the TDO connecter output. TCK is connected in parallel to each device, TMS the control pin works similarly.

In this way, particular tests can be applied to the device interconnects via the global scan path by loading the stimulus into the appropriate device output scan cells via the edge connecter TDI (shift-in operation), applying the stimulus (update operation), capturing the responses at the device input scan cells (capture operation), and shifting the response values out to the edge connector TDO (shift-out operation). Essentially the boundary scan cells can be thought of as the "virtual nail".

There are four modes to be aware of normal, update, capture, and serial shift. During normal mode, data_in is passed straight through to Data_out. During update mode, the content of the output register is passed through the Data_out. During capture mode, the Data_in signal is routed to the shift register and the value is captured by the next ClockDr state. During shift mode, the scan_out of the register flip flop is passed through to the scan_in of the next via a hard wired path.